An integrated circuit device typically includes a network of circuits that are formed over a substrate. The device may include several layers of circuit wiring, with various interconnects being used to connect these layers to each other and any underlying transistors. Generally, as a part of the manufacturing process, vias or contact holes are formed, which are transferred to another layer and then filled with a metal to form interconnects, so that the various layers of circuitry are in electrical communication with each other. Prior art methods of forming interconnects generally rely on a series of lithographic and etching steps to define the positions and dimensions of the vias, which in turn define the positions and dimensions of the corresponding interconnects. To this end, photoresist materials and hard masks may be employed. However, the dimensions of features formed using conventional optical lithography techniques for volume manufacturing (e.g., 193 nm dry and immersion lithography) have reached the resolution limit of the lithographic tools.
The creation of vias with smaller critical dimensions (CDs), tighter pitches, and better CD uniformity is one of major challenges for future technology nodes. However, printing such via patterns beyond the 22 nm node is expected to be difficult using conventional optical lithography, even with expensive and complicated double patterning processes, resolution enhancement technology (computational lithography), and severe layout design restrictions. Unfortunately, no alternative non-optical lithographic technique with higher resolution capabilities, such as electron-beam lithography or extreme ultraviolet lithography (EUV), appears to be ready for high volume manufacturing in the near future. While electron-beam direct write lithography is capable of very high resolution, it is a direct-write technique and cannot achieve the necessary wafer throughput levels to make it viable for volume manufacturing. EUV lithography tools have been under development for many years. However, many challenges associated with the source, collection optics, masks, and resists still remain and will likely delay any practical implementation of EUV lithography for several years.
Block copolymer (BCP) patterning has attracted attention as a possible solution to the problem of creating patterns with smaller dimensions. Under the right conditions, the blocks of such copolymers phase separate into microdomains (also known as “microphase-separated domains” or “domains”) to reduce the total free energy, and in the process, nanoscale features of dissimilar chemical composition are formed. The ability of block copolymers to form such features recommends their use in nanopatterning, and to the extent that features with smaller CDs can be formed, this should enable the construction of features that would otherwise be difficult to print using conventional lithography. However, without any guidance from the substrate, the microdomains in a self-assembled block copolymer thin film are typically not spatially registered or aligned.
To address the problem of spatial registration and alignment, directed self-assembly (DSA) has been used. This is a method that combines aspects of self-assembly with a lithographically-defined substrate, known as a guiding pattern, to control the spatial arrangement of certain self-assembled BCP domains. One DSA technique is graphoepitaxy, in which self-assembly is guided by topographical features of lithographically pre-patterned substrates. BCP graphoepitaxy provides sub-lithographic, self-assembled features having a smaller characteristic dimension than that of the prepattern itself. Another DSA technique is chemoepitaxy, in which hexagonally arranged dots with negligible topography but a well-defined chemical contrast with the neutral background guides the hexagonal packing of BCP microdomains through DSA.
In current practice, however, both graphoepitaxy and chemoepitaxy suffer from several drawbacks. With graphoepitaxy, the filling conditions of the BCP are critical to the DSA result. Non-optimal BCP filling conditions (such as over-filling or under-filling) will lead to un-desired morphology from DSA and hence defects through pattern transfer. To obtain uniform filling conditions across the wafer, the pattern features (such as contact holes and vias) need to be evenly distributed, which requires strict control of pattern pitch and hence limits the flexibility of design. Further, the pattern features need to have vertical sidewall angle for proper DSA and good thermal stability to endure the DSA annealing process, which severely limits the selection of materials and hence raises the cost of materials. With chemoepitaxy, the current approach guides the hexagonal packing of BCP microdomains thru DSA, as noted above. Accordingly, the post-DSA features are limited to one pitch with one packing symmetry (hexagonal packing), which likewise has severely-limited design flexibility.
As such, what is needed in the art is a simple, cost effective method for directed self-assembly process that overcomes the problems encountered in prior art methods. In particular, it is desirable to provide DSA methods that are less sensitive to filling conditions and material selections, and that allow for varied pitches and design configurations. Furthermore, other desirable features and characteristics of the inventive subject matter will become apparent from the subsequent detailed description of the inventive subject matter and the appended claims, taken in conjunction with the accompanying drawings and this background of the inventive subject matter.